1. Field of the Invention
This invention relates to mask designs which control Electrostatic Discharge, ESD, and more particularly to methods of preventing mask damage due to ESD.
2. Description of the Related Art
Electrostatic Discharge, ESD, can cause considerable damage in dense integrated circuit devices. Many procedures and tools have been introduced for the specific purpose of controlling damage due to ESD. ESD damage is also an important concern for the masks used to fabricate integrated circuit devices. ESD events on a mask can distort the mask patterns which destroys the accuracy of the mask patterns. Avoiding mask damage due ESD events is an important consideration in mask design and use.
U.S. Pat. No. 5,567,550 to Smayling describes a method of making a mask for making integrated circuits. The mask is used to fabricate an integrated circuit chip which eliminates damage due to ESD on the chip.
U.S. Pat. No. 5,403,683 to Ohta et al. describes a photo-mask which comprises a light-permeable substrate, mask patterns formed of light-shielding films formed on the substrate, and a light-permeable protective film made of a conductive substance disposed over the surface of the substrate including the patterns formed of light-shielding films.
U.S. Pat. No. 5,798,192 to King et al. describes a mask using chrome patterns with a thin conductive layer formed over the chrome patterns to protect the chrome patterns from damage due to ESD events.
Electrostatic Discharge, ESD, damage is an important concern for the masks used to fabricate integrated circuit devices. ESD events occur when an electrostatic potential builds up on metal pattern elements until an electrical discharge from one metallic pattern element to another metallic pattern element occurs. This electric discharge can transport part of the one metallic pattern element and deposit it on another metallic pattern element or deposit metal fragments in the gap between the pattern elements which will distort the mask pattern. This distorted mask pattern can then be transferred to the integrated circuit chip fabricated using the mask.
FIG. 1 shows a top view of a conventional mask having opaque pattern elements formed on a transparent mask substrate. The opaque pattern elements are formed of a material such as chrome and the transparent mask substrate is typically quartz. The mask has a pattern region 12 surrounded by a seal ring 10 of chrome. The pattern region 12 has a number of pattern images 14 which are to be transferred to an integrated circuit wafer. As shown in FIG. 2A the pattern images 14 have a number of straight lines 16 as well as lines 18 having corners. Regions of the pattern images having spaces between lines 20 and the interior of corners 22 are particularly susceptible to damage due to ESD events. As shown in FIG. 2B ESD can leave chrome residue 21 in the region between lines 16. ESD can also leave chrome residue 23 in the interior corners of lines 18.
It is a principle objective of this invention to provide a mask design which protects the pattern regions from damage due to ESD events.
This objective is achieved by forming an anti-ESD ring around the pattern region of the mask. The anti-ESD ring has a space between two broad border regions formed of an opaque metal such as chrome. ESD fingers, or rods extend from one of the border regions to within a small gap of the other border region. These ESD fingers act as lightning rods so that ESD events preferably occur across this small gap between the ESD fingers and one of the border regions. The ESD fingers are small enough so that any metal transferred across the gap in an ESD event is very small. The gap is located so that any metal transferred is far away from the pattern region of the mask. The ESD fingers confine ESD events to a preferred region of the mask and damage to the pattern region is avoided.
The ESD fingers can also project from each of the border regions and terminate with a small gap between two of the fingers each connected to different border regions. The ESD fingers can have a rectangular tip or a special shape such as a pointed tip to aid in a quiet ESD discharge.